24LC04B-I/SN Microchip Technology EEPROM x8 – V datasheet, inventory, & pricing. Single supply with operation down to V for. 24AA04 devices, V for 24LC04B devices. • Low-power CMOS technology: Read current 1 mA, typical. The Microchip Technology Inc. 24LC04B/08B is a 4K or .. Products supported by a preliminary Data Sheet may have an errata sheet describing minor.

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The Microchip Technology Inc. The 24XX04 also has a page write. CS Chip Scale 2. The descriptions of the pins are listed in Table SDA is a bidirectional pin used to transfer addresses. Since it is an open. For normal data transfer, SDA is allowed to change. Changes during SCL high are.

PDF 24LC04B Datasheet ( Hoja de datos )

The SCL input is used to synchronize the data transfer. If tied to V SSnormal memory operation is enabled. If tied to V CCwrite operations are inhibited.

The Chip Scale package does not support the write. Read operations are initiated in the same way as dtaasheet. There are three basic types.

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24LC04B/P Microchip | Ciiva

The 24XX04 contains an address datashdet that main. Dataaheet, if the datasyeet access. Upon receipt of the slave address. Random read operations allow the master to access. This is accomplished by sending the word. Once the word address is sent, the master generates a.

Start condition following the acknowledge. Address Pointer is set. The master then issues the. The master datadheet not acknowledge. Sequential reads are initiated in the same way as a. To provide sequential reads, the 24XX04 contains an. Pointer allows the entire memory contents to be serially. Bus Activity T Control. Clock Frequency 24AA04 1. Ranges I I, E Features: The device is organized as two blocks of x 8-bit memory with a 2-wire serial interface.

Low-voltage design permits operation down to 1. The 24XX04 also has a page write capability for up to 16 bytes of data. The entire memory will be write-protected. Read operations are not affected. The Chip Scale package does not support the write- protect feature. There are three basic types of read operations: The master will not acknowledge the transfer, but does generate a Stop condition and the 24XX04 discontinues transmission Figure To perform this type of read operation, the word address must first be set.

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This is accomplished by sending the word address to the 24XX04 as part of a write operation. Once the word address is sent, the master generates a Start condition following the acknowledge. This termi- nates the write operation, but not before the internal Address Pointer is set.

The 24XX04 will then issue an acknowledge and transmit the 8-bit data word. The master will not acknowledge the transfer, but does generate a Stop condition and the 24XX04, will discontinue transmission Figure This directs the 24XX04 to transmit the next sequentially- addressed 8-bit word Figure To provide sequential reads, the 24XX04 contains an internal Address Pointer that is incremented by one upon completion of each operation.

This Address Pointer allows the entire memory contents to be serially read during one operation. DSK-page 11 11 Page.